PLL - traduction vers russe
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PLL - traduction vers russe

ELECTRONIC CIRCUIT
Phase locked loop; PLL; Phase-Lock Loop; Phase-Locked Loop; Phase-locked loops; Pll loop expansion factor; Phase lock loop; Digital phase-locked loop; Phase-locked synchronization circuit; Phase-Locked Loops; Phase Locked Loop; Phased-lock loops; Phased-lock loop
  • [[ON Semiconductor]] HC4046A
  • An example digital divider (by 4) for use in the feedback path of a multiplying PLL
  • [[Block diagram]] of a phase-locked loop
  • center
  • Simplest analog phase locked loop

PLL         

общая лексика

Phase-Locked Loop

фазовая автоматическая подстройка частоты, ФАПЧ

используется в некоторых периферийных устройствах, в составе различной аппаратуры связи, систем спутникового вещания и передачи данных. Первая система ФАПЧ была разработана в 1930 г. французским инженером Беллизом, однако широкое распространение таких систем началось с появлением интегральных схем

Смотрите также

phase detector

PLL         
permanent logical link
постоянный логический канал
.PLL      

общая лексика

Prelinked Library

в СУБД Clipper

Wikipédia

Phase-locked loop

A phase-locked loop or phase lock loop (PLL) is a control system that generates an output signal whose phase is related to the phase of an input signal. There are several different types; the simplest is an electronic circuit consisting of a variable frequency oscillator and a phase detector in a feedback loop. The oscillator's frequency and phase are controlled proportionally by an applied voltage, hence the term voltage-controlled oscillator (VCO). The oscillator generates a periodic signal of a specific frequency, and the phase detector compares the phase of that signal with the phase of the input periodic signal, to adjust the oscillator to keep the phases matched.

Keeping the input and output phase in lockstep also implies keeping the input and output frequencies the same. Consequently, in addition to synchronizing signals, a phase-locked loop can track an input frequency, or it can generate a frequency that is a multiple of the input frequency. These properties are used for computer clock synchronization, demodulation, and frequency synthesis.

Phase-locked loops are widely employed in radio, telecommunications, computers and other electronic applications. They can be used to demodulate a signal, recover a signal from a noisy communication channel, generate a stable frequency at multiples of an input frequency (frequency synthesis), or distribute precisely timed clock pulses in digital logic circuits such as microprocessors. Since a single integrated circuit can now provide a complete phase-locked-loop building block, the technique is widely used in modern electronic devices, with output frequencies from a fraction of a hertz up to many gigahertz.

Traduction de &#39PLL&#39 en Russe